A method of reducing, by etching process non induced by omitting the deposition of an endpoint detection layer during the patterning of stressed surface layers in a semiconductor device

A method comprising: Forming a first stress-inducing layer over a first transistor and a second transistor; Removing a portion of the first stress-inducing layer disposed over the first transistor; Forming a second stress-inducing layer on the first stress-inducing layer; and Removing a portion of the second stress-inducing layer from the first transistor based on a atzzeitgesteuerten etching process; wherein the etching time on the basis of measurement data indicating a layer thickness of the second stress-inducing layer, and is determined by previously obtained etching downstream measurement data with respect to an etching rate of the atzzeitgesteuerten etching process that was carried out for a previously processed substrate, wherein the obtaining of the etching downstream measurement data comprising: determining a step height in the above-processed substrate, wherein the step height generated during the etching process atzzeitgesteuerten, by means of a scanning profile measurement method.