Reduction of thickness variations schwellwerteinstellenden a semiconductor alloy by reducing the Strukturierungsungleichmäßigkeiten prior to the deposition of the semiconductor alloy

A method comprising: Forming a mask layer (205) over a first silicon-containing crystalline semiconductor region (203A) and a second silicon-containing crystalline semiconductor region (203B), said first and second silicon containing crystalline semiconductor region are laterally separated by an isolation region (204); Removing the mask layer (205) by a first plasma-assisted etching of the first silicon-containing crystalline semiconductor region (203A), while the mask layer (205) above the second silicon-containing crystalline semiconductor region (203B) is maintained; Reducing a thickness of the first silicon-containing crystalline semiconductor region (203A) by a second plasma-assisted etching process for etching the first silicon-containing crystalline semiconductor region (203A) is better suited than the first plasma enhanced etching process to a height difference between the first silicon-containing crystalline semiconductor region (203A) and the isolation region (204) to decrease; thereafter performing a wet chemical etching process to further lowering of the first silicon-containing crystalline semiconductor region (203A); Forming a schwellwertspannungseinstellenden semiconductor alloy (209) to the lowered first silicon-containing crystalline semiconductor region (203A); Forming a first gate electrode structure ...