164 nW Inverter-based capacitive readout IC for microaccelerometer

This paper proposes a 164 nW inverter-based capacitive readout integrated circuit (IC) for a microaccelerometer. The designed circuit is implemented using a two-stage inverter-based fully differential current-reuse amplifier to achieve ultra-low power consumption. In order to obtain low magnitudes of current consumption, supply voltage and noise characteristic, the amplifier in the capacitive sensing chain is designed using two cascaded current-reuse inverter stages for both high DC gain and output swing. The low-voltage current-reuse two-stage amplifier configuration with resistive common mode feedback can effectively reduce the power consumption. Two passive resistive common mode detectors and an error amplifier constitute the common mode feedback to enhance the operating range. The correlated double sampling technique is also employed to reduce the flicker (1/f) noise. The IC chip is fabricated using a 0.18-µm 1P6M CMOS process, with an active area of 1.74 mm2, and it consumes an extremely low amount of power, 164 nW at a supply voltage of 0.7 V. The input-referred noise floor of the readout IC is measured to be 4.75 aF/√Hz.