The Proposed DSIP Architecture Template for the Wireless Communication Domain

In this chapter, the proposed Domain Specific Instruction set Processor (DSIP) architecture template and the corresponding design approach, which target emerging wireless communication systems, are explained. Section 3.1. defines the considered domain and explains the proposed DSIP platform design approach. Information on the applied design approach for defining the template is provided in Sect. 3.2. Thereby also the considered layout constraints, which ensure scalability in advanced Deep Deep Sub-Micron (DDSM) technologies, are summarized. The analysis of domain-specific algorithm characteristics will be shown in Sect. 3.3. Section 3.4 motivates the choices of the employed architectural concepts. In Sect. 3.5, the proposed architecture template will be explained. The scalability of the template will be reviewed in Sect. 3.6. Section 3.7 summarizes the main concepts of the proposal and their main differences compared to conventional approaches. Finally, Sect. 3.8 concludes this chapter. This chapter also includes an appendix which shows the concepts/ideas of the proposed back-end semi-custom design approach.