A method for manufacturing a semiconductor package
2005
Provided is a method for manufacturing a semiconductor package, which includes the steps of: providing a lower semiconductor package including a lower package substrate, and a lower dummy ball and a lower solder ball which are formed on the upper side of the lower package substrate; providing an upper semiconductor package including an upper package substrate and an upper dummy ball and a lower dummy ball which are formed on the lower side of the upper package substrate; aligning the upper solder ball and the lower solder ball by combining the upper dummy ball with the lower dummy ball at a first temperature; and forming a connection terminal, with which the upper solder ball and the lower solder ball are combined, at a second temperature. Accordingly, the present invention can prevent the misalignment of the upper semiconductor package and the lower semiconductor package.
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