0.5-V Low-Power Analog Circuits

With respect to energy harvesting, it is an eligible objective to have circuits which are able to perform proper functionality with lowest supply voltages, while consuming only little power. In order to improve the feasibility and efficiency of such systems new concepts and innovations in the field of analog circuit design are mandatory. Therefore, the design emphasis is always on energy-efficient low-voltage operation with a sufficient PVT robustness, i.e. current biasing needs to remain constant at all operation conditions ranging from 0.5 to 3.3 V. This implicates also that a high robustness is achieved against variations in matching and process parameters. Moreover, insensitivity to large supply swings of up to the process maximum rating of 3.6 V is a need with unstable power supplies like energy harvesting. Thus, this Chapter introduces the basic circuit blocks necessary to implement the power processing modules as announced in Sect. 2.4. All necessary circuits are developed and introduced for realizing the supply layer building blocks with a low-power architecture. Starting with operational amplifier design as the most complex circuits, appropriate biasing with start-up and re-start ability, as well as a voltage reference concept follow. In addition, a line regulator complements the amplifier for usage over the aimed wide voltage range. Furthermore, comparators and timing circuit (PWM) are presented—both are necessary for realizing event driven low-power architectures. A line regulator, ring oscillator, and a pulse-width modulator complete the set of basic analog circuits. The developed circuit structures are implemented with 0.35\(\,{\upmu }\)m CMOS devices. For wide voltage-range operation the main idea is reducing the number devices (transistors) stacked between the supply rails. So, low-voltage compatibility is achieved with a maximum of two stacked transistors at all analog circuits.