Performance analysis of a 127-micron pixel large-area TFT/photodiode array with boosted fill factor

2004 
Sensor fill factor is one of the key pixel design requirements for high performance imaging arrays. In our conventional imaging pixel architecture with a TFT and a photodiode deposited in the same plane, the maximum area that the photodiode can occupy is limited by the size of the TFT and the surrounding metal lines. A full fill factor array design was previously proposed using a continuous sensor layer1. Despite the benefits of 100% fill factor, when applied to large-area applications, this array design suffers from high parasitic line capacitances and, thus, high line noise. We have designed and fabricated an alternative pixel structure in which the photodiode is deposited and patterned over the TFT, but does not overlap with the lines underneath. Separating the diode from the TFT plane allows extra space for an additional TFT which can be used for pixel reset and clipping excessive charge in the photodiode developed under high illumination. This reduces memory effect by 250%. The yield and the reliability are expected to improve as well since the TFTs and lines are buried underneath the diode. With the increased fill factor, we collect 56% more electrons per pixel, thereby improving the signal to noise ratio. The maximum signal to noise ratio is achieved when the increased signal and the undesirable parasitic capacitance on the data line are best optimized. Linearity, sensitivity, leakage, and MTF characteristics of a prototype X-ray imager based on this architecture are presented.
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