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FPGA implementation of 1 Gbps real-time 44 MIMO-MLD
FPGA implementation of 1 Gbps real-time 44 MIMO-MLD
2005
Toshiaki Koike
Yukinaga Seki
Hidekazu Murata
Susumu Yoshida
Kiyomichi Araki
Keywords:
Field-programmable gate array
Chip
MIMO
Multiplication operator
Computer science
Electronic engineering
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