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0.95V Substrate Bias Generator for Leak Power Reduction of 0.5V Digital Logic Circuits
0.95V Substrate Bias Generator for Leak Power Reduction of 0.5V Digital Logic Circuits
2006
C. H. Choi
G S Kim
S . Y . Lee
J. B. Kim
S.H. Oh
N.T. Trung
S.-W. Kim
Keywords:
Boolean algebra
Leak
Electronic circuit
Engineering
Electronic engineering
digital logic circuits
Electrical engineering
Correction
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