Manufacturing benefits of disilane as a precursor for polycrystalline silicon films for the advanced CMOS gate electrode

2005 
The polycrystalline silicon deposited by single-wafer rapid thermal chemical vapor deposition with both silane (SiH/sub 4/) and disilane (Si/sub 2/H/sub 6/) precursors have been characterized for across wafer uniformity, thickness repeatability, and basic material properties such as grain structure and surface topography. The results show that the disilane process greatly improves the manufacturability of the single-wafer polycrystalline silicon process. Specifically, a /spl sim/50% improvement in the thickness uniformity, /spl sim/25% improvement in surface roughness, and a significantly less sensitivity of the process to hardware have been achieved with similar particle performance. The grain structure of as-deposited and postimplant and anneal films have been compared by X-ray diffraction and transmission electron microscope. NMOS and PMOS capacitors have been fabricated with polycrystalline silicon using silane and disilane precursors. The grain structure and electrical parameters, such as gate leakage currents and gate capacitance, show no significant difference between these two precursors.
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