A method of manufacturing a transistor having a shallow implantation by using a two-stage Epitaxialschichtprozesses

A method of manufacturing a transistor from a wafer having gate structures on the wafer, comprising the steps of: Depositing a first spacer on the wafer (16) and the gate structures (7, 8, 9) around and then etching the first spacer from the wafer, so that the first spacer (28) around the gate structures (7, 8, 9) remains around; Growing a first silicon epitaxial layer (30) on the wafer (16); around depositing a second spacer (32) on the first silicon epitaxial layer (30) and to the gate structures (7, 8, 9) and then etching the second spacer (32) from the first silicon epitaxial layer (30) so that the second spacer (32 ) to form the gate structures (7, 8, 9) around remains; Growing a second silicon epitaxial layer (34) on the first silicon epitaxial layer (30); Etching the second spacer (32) around the gate structures (7, 8, 9) around; Implanting ions to form a first, a second, a third and a fourth ...