A low-power fully-integrated SP10T-RF-switch-IC

A new architecture has been designed and demonstrated for a low-power SP10T-RF-Switch-IC using 0.18μm SOI-CMOS, implementing an RF-Switch, negative voltage generator, and MIPI in a chip. Clock frequency of the negative voltage generator is controlled to increase only in a switch transition and drop at other times in order to reduce power consumption. Results of an evaluation of a trial chip confirmed a 33% reduction in power consumption compared with conventional architecture while RF performance is maintained.