A method of fabricating an integrated circuit including a lateral trench transistor and a logic circuit elements

A method of forming an integrated circuit comprising a lateral trench transistor and a logic circuit element includes forming a plurality of gate trenches (S100) in the first main surface of a semiconductor substrate, wherein the gate trenches are formed so that a longitudinal axis of the gate trenches in a first direction parallel to the first major surface. Further, the method includes forming a source contact recess (S110), which runs parallel to the first major surface in a second direction, said second direction being perpendicular to the first direction, and the source contact recess extending along said plurality of gate trenches, forming a source region (S120), which comprises performing a doping process to introduce dopants through a side wall of the source contact recess, and a filling of a sacrificial material (S130) in the source contact recess. Furthermore, the method then includes forming thereafter components (S140) of the logic circuit element, removing the sacrificial material (S150) from the source contact recess and filling a conductive material source (S160) in the source contact recess.