A novel ESD protection circuit for ultra-deep-submicron low power mixed-signal IC designs

A novel ESD protection scheme for thinner gate-oxide core devices in ultra-deep-sub-micron process will be illustrated. The novel ESD protection scheme has demonstrated significant ESD improvements for 0.13 um low power crystal oscillator buffer designs. With the new protection circuit, HBM ESD data can be improved from about 1.5 KV original to greater than 5 KV, and MM ESD data can be improved from 100 V to more than 500 V. The simulations and experimental silicon data will be presented.