Analysing real time power of the microprocessor to estimate thermal time constant of the hotspot

The power dissipation in a microprocessor is spatially and temporally non-uniform resulting in hot spots, high temperature gradients and as a consequence, high thermal stresses. This temperature non-uniformity and existence of hotspots in the processor poses a threat to the performance and reliability of the processor in the long run. The dynamic thermal management (DTM) techniques applied at the architectural level are proven to be more efficient to address the rapid power variation in the processor components. Since, the efficiency of DTM techniques is based on the thermal response of the microprocessor, it is imperative to reduce the time lag between the thermal response of the chip and strategy adopted by DTM to manage the hotspot temperature. This strategy will also be applicable in boosting up the clock frequency momentarily for high performance without causing any chip damage due to high temperature excursions. This paper studies the temporal and spatial variation of power dissipation in a commercially available single-core microprocessor. The real power dissipation estimates are obtained for benchmarks using cycle-accurate microarchitectural simulator. In the selected benchmarks, the hottest component has significantly high power dissipation compared to remaining components of the processor. The real time power dissipation of the components is then analyzed to study the thermal time constant of the hotspot and the combined thermal effect of the other components on the hotspot temperature. The analysis is done both for a finer and coarser time intervals to identify the effect of time scale on the thermal time constants.