4 transistors 4 shared step & repeat unit cell and 4 transistors 4 shared image sensor including the unit cells

A 4T-4S step & repeat unit cell obtained by combining four image sensor unit cells each including four transistors and a 4T-4S image sensor including the 4T-4S step & repeat unit cell are provided. The 4T-4S step & repeat unit cell includes first and second shared image sensor unit cells. The first shared image sensor unit cell includes first and third photodiodes and five transistors. The second shared image sensor unit cell includes second and fourth photodiodes and five transistors. The second photodiode is disposed over the first photodiode. The third photodiode is disposed at a side of the second photodiode. A terminal of each of the fourth photodiode is connected to a first voltage source. Signals corresponding to images incident onto the first and third photodiodes are output through a first common detection line OUT1. Signals corresponding to images incident onto the second and fourth photodiodes are output through a second common detection line OUT2.