Selective erasable and programmable NAND‐type MNOS memory

This study was made of a new programming method and memory characteristics of an NAND-type MNOS memory cell which uses half the size of the conventional two-transistor structure using the same design rule. As a result, it was found that inadvertent writing can be prevented under the write inhibit mode by using a new sequencing (PURGE mode) which moves unnecessary thermal electrons generated under MNOS gate to the bit lines. Also, it was verified that selective rewriting by NAND type can be realized. This prototype of NAND-type MNOS memory cell can realize PURGE effect by applying 3 V and a very short pulse of 30 ns. It was found out also that possible number of PURGES of unselected memory cells at each writing is about 1010. The limit of the read cycle is about 106 when the word line consists of 128 bytes.