Method for manufacturing high-insulation resistant planar pn junction

PURPOSE: To adapt to the actual states of various structures and various values of desired surface breakage voltage and to obtain sureness and representativeness by selecting an etching depth, so that a surface breakage voltage of pn junction to which a bias voltage is applied in reverse direction is adjusted to a specified value. CONSTITUTION: After a thermal process, a part starting from an upper side interface 1a of peripheral part of a region of semiconductor 11b is etched for removal. At that time, in order that a surface breakage voltage of pn junctions 12a and 12b to which a bias voltage is applied in the reverse direction is adjusted to a specified value, size of an etching depth 17 is selected. Thereby, possibility for the adaptation to the actual states of various structures or various values of desired surface breakage voltage becomes easy, while sureness and representativeness in manufacture is obtained. COPYRIGHT: (C)1990,JPO