High Density TSV-Free Interposer (TFI) Packaging with Submicron Cu Damascene RDLs for Integration of CPU/GPU and HBM

TSV-Free Interposer (TFI) packaging technology was developed for central/graphics processing unit (CPU/GPU) and stacked memory system-in-package (SiP) applications. TFI package is targeting to accommodate thick module as High Bandwidth Memory (HBM) and wide-bus interconnections between CPU/GPU and HBM in a package with cost-effective process. The redistribution layer structure was studied based on inter-chip connectivity between CPU/GPU and HBM as well as signal integrity and power integrity. This study demonstrated capability of TFI package in view of electrical performance, cost effectiveness and process challenges. The process challenges were overcome by co-design modeling and process optimizations.