Pipeline type floating point adder subtracter for digital computer

PURPOSE: To compensate bit loss due to set bit discarding by providing a decimal part separation and array device, an exponential part adder, etc., and improving a subtracting method for two floatingpoint decimal numbers and generating a sticky bit signal. CONSTITUTION: Source operands 1 and 2 are outputted to a decimal-part 1 separation and array device 12, a decimal-part 2 separation and array device 13, etc., through latches 10 and 11 and the decimal parts are arrayed. In this case, the devices 12 and 13 generate sticky bit signals to compensate the discarding of set bits. Then one decimal part is subtracted and optionally specified through latches 16 and 17 and an exponential part adder 15, the complement of the specified decimal part is generated and added to the other decimal part, and the result is normalized by a normalizing device 18 and then sent to an exponential part adjusting device 19. The device 19 selects and adjusts a larger floating-point exponential part and sends the result to a rounding and combining device 21. The device 21 adds a rounding constant to the result of the device 19 to perform a rounding and combining process and outputs the result through a latch 22, so that the subtracting process is properly performed. COPYRIGHT: (C)1990,JPO