A hybrid architecture for a high performance and physical small low-level image processing system

1992 
Deals with the hardware implementation of a low-level image processing unit for mobile autonomous systems. High processing performance and a small physical size of the sensor and processing unit are two important factors. The image processing unit described here combines between high system performance and flexibility. The emphasis for this design lies on two aspects, i.e. adapted processors, in this case SIMD processor-arrays, and guided data reduction by means of finding partial images. >
    • Correction
    • Source
    • Cite
    • Save
    • Machine Reading By IdeaReader
    5
    References
    2
    Citations
    NaN
    KQI
    []