Characterizing the Electrical Properties of a Novel Junctionless Poly-Si Ultrathin-Body Field-Effect Transistor Using a Trench Structure

Ultrathin channel trench junctionless poly-Si field-effect transistor (trench JL-FET) with a 2.4-nm channel thickness is experimentally demonstrated. Dry etching process is used to form trench structures, which define channel thickness ( $T_{\mathrm {CH}})$ and gate length ( $L_{G})$ . These devices ( $L_{G}= 0.5 \mu $ m) show excellent performance in terms of steep subthreshold swing (100 mV/decade) and high $I_{\mathrm{{\scriptstyle ON}}}/ I_{\mathrm{{\scriptstyle OFF}}}$ current ratio ( $10^{6}$ A/A) and practically negligible drain-induced barrier lowering ( $\sim 0$ mV/V). The $I_{\rm \mathrm{{\scriptstyle ON}}}$ current of the trench JL-FET can be further increased by the quantum confinement effect. Importantly, owing to its excellent device characteristics and simplicity of fabrication, the trench JL-FET has great potential for using in advanced 3-D-stacked IC applications.