Scaling Solder Micro-Bump Interconnect Down to $10\ \mu\mathrm{m}$ Pitch for Advanced 3D IC Packages

This paper discusses the efforts to shrink the micro-bump pitch to $20\ \mu\mathrm{m}$ and then $10\ \mu\mathrm{m}$ with solder micro-bumps for silicon-on-silicon 3D assembly by leveraging alternate solder diffusion barrier metals and tuning the assembly process to realize both good yield and reliable interconnects. Specifically in this paper, the assembly process challenges are detailed and the impact of our barrier metal assessment and process optimization to resolve these technical challenges are discussed through the study of solder joint reliability results using internal $20 \mu \mathrm{m}$ pitch and $10\ \mu\mathrm{m}$ pitch solder micro-bump test-vehicles (TV).