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High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered Routing
High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered Routing
2019
Chen Yu-ting
Kim Jin-Hee
Li Kexin
Hoyes Graham
H Anderson Jason
Keywords:
High-level synthesis
Field-programmable gate array
Search engine
Computer architecture
Computer science
Electronic circuit
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