Information processing device

It is possible to execute a bit operation without lowering the bus performance. An information processing device (10) includes CPUs (101, 102) which can fetch and execute a command and peripheral modules (M1, M2, M3) each having a built-in register which can be rewritten by the CPUs and connected to the CPUs by a bus. The CPUs have a function to issue a bus command for instructing a write operation in the bit unit into the registers contained in the peripheral modules so as to execute the bit operation command fetched by the CPUs. When the bus command is issued, the peripheral modules execute the write operation in the bit unit into the registers. Thus, after the bus command is issued, the CPUs need not lock the bus. That is, it is possible to execute the bit operation without lowering the bus performance.