An approach to fabricating sub-half-micrometer-length gates for GaAs metal-semiconductor field-effect transistors

1985 
A process for fabricating sub‐half‐micrometer‐length gates for GaAs MESFETs is described. This process, which uses conventional photolithography, incorporates a number of special techniques to produce the gates from a photomask having 1‐μm‐length gate patterns. Gates produced by this process have shapes and cross‐sectional areas that are comparable to those of gates produced by liftoff using sub‐half‐micrometer electron‐beam lithography. Gates with lengths less than 0.2 μm have been fabricated.
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