vCSIMx86: a Cache Simulation Framework for x86 Virtualization Hosts

Simulation offers many benefits of studying the cache behavi or of modern chip-multiprocessor architectures. Most existing full system simulators, however, have difficulties in simulating a v irtualized x86 host due to the lack of virtualization support or h igh runtime overhead caused by the complex pipelined CPU model. We propose a new framework to address these issues, called vCSIMx86, which enables full system simulation of the cache behavior of x86 virtualization hosts. vCSIMx86 splits the simulation process into two key steps ‐ generating memory access traces and simulating the cache model. There are two main advantages of splitting the process: (i) the ability to leverage existing system emu lation and cache simulation tools and (ii) reducing the overall cache simulation time. We identify and then demonstrate the required modifications to the system emulator (QEMU) and cache simulators (e.g., DineroIV) in order to facilitate support of virtualization . To validate the accuracy and effectiveness of vCSIMx86, we (i) compare the memory access traces of an emulated machine with real program behavior and (ii) simulate cache models with different parameters. Moreover, we have defined a new classification sc heme of cache misses as a case study for using vCSIMx86. The evaluation results show that cache misses due to VM interference are an important factor to the cache performance.