A DAQ prototype for the ATLAS small-strip Thin Gap Chamber Phase-I trigger upgrade

We will present a DAQ prototype designed for the ATLAS small-strip Thin Gap Chamber (sTGC) Phase-I trigger upgrade. The prototype includes two VMM2 chips developed to read out the signals of the sTGC, a Xilinx Kintex-7 FPGA used for the VMM2 configuration and the events storage, and a Gigabit Ethernet Transceiver (GET) working at the physical layer. The features of the DAQ prototype are described in detail.