The semiconductor device and the forming method

2014 
PROBLEM TO BE SOLVED: To reduce the area of transistors in a ReRAM.SOLUTION: A plurality of memory cells MC are different from each other in the combination of bit lines BL and plate lines PL. The electric potential of a plate line PL2 is forming voltage Vform, whereas the electric potential of the other plate lines PL is +Vi. The electric potential of a bit line BL2 is 0 V (ground electric potential), whereas the electric potential of the other bit lines BL is +Vi. The electric potential of a word line WL2 is +Vgf, whereas the electric potential of the other word lines WL is +Vi'.SELECTED DRAWING: Figure 6
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