Robust BEOL Process Integration with Ultra Low-k (k=2.0) Dielectric and Self-Formed MnO x Barrier Technology for 32 nm-node and beyond

Porous Low-k dielectric (k=2.0) was applied for Copper (Cu) dual-damascene interconnect with SiOC/PAr hybrid dielectric. More than 90% yield for via was obtained and approximately 5% capacitance reduction in inter-layer was obtained compared with the porous-SiOC/porous-PAr (k=2.3) hybrid dielectric process. The performance of stress-induced voiding was the same as for the conventional process. Meanwhile, with self-formed barrier process, more than 10 nm wider tolerances for misalignment was obtained compared with the conventional tantalum (Ta) barrier metal (BM) process, due to its thin barrier thickness and Cu-to-Cu connection for via and wiring.