FPGA based sigma-delta analog to digital converter for power sensing

This paper discuss the design and implementation of Sigma-Delta Analog to Digital converter (ΣΔ A/D converter) within an FPGA for a moderate current sensing application. Although FPGA do not posses such analog interface but it is possible to implement an ADC inside an FPGA by taking advantage of the low voltage differential signaling (LVDS) receiver inside the FPGA With a minimum number of external analog components used, AID converter can be implemented in the FPGA devices by using the Sigma-Delta modulators topology to successfully interface analog signals with the FPGA.