Optimization and fabrication of amorphous silicon based TFT
2016
Thin Film Transistors (TFTs) are gaining its popularity in all fundamental electronic devices from large diagonal flat display TVs to flexible electronic devices. In this work, the dielectric layer of the TFT, amorphous Silicon Nitride films was fabricated and optimized using Plasma Enhanced Chemical Vapour Deposition (PECVD) technique, using Silane (SiH 4 ) and Ammonia (NH 3 ) as the precursor gases. The optimized process parameters for this thin layer coating had a deposition rate of 63.7 nm at 250 o C, 7W RF power and gas flow ratio of 1:3 (SiH 4 : NH 3 ). Using electrical and optical characterization, the electrical resistance and electronic bandgap of these thin films were found to be 2.71 GΩ and 2.72eV respectively. The semiconductor active layer was chosen to be hydrogenated amorphous silicon (a-Si: H), which was coated using PECVD technique, using SiH 4 and H 2 as the precursor gases. The chemical composition of a-Si: H coating was confirmed using Raman Spectroscopy. The Gate, Drain and Source materials were chosen to be Aluminium, which was coated using Thermal Evaporation technique and the electrical resistance was measured to be 0.8 Ω. The final TFT constructed using these individual layers, was characterized for its IV characteristics using a semiconductor device analyzer and the values of the current obtained were in μAmps. However, the obtained graphs showed a lack of saturation for increased drain voltage values. On further analysis, it was learnt that the performance of this TFT could be further improved by increasing the P-type doping of a-Si: H thin films.
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