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Acemap > Paper > Technology for a 250V Monolithic Complementary MOSFFT LSJ with N+ Buried-Layer Protected CMOS Logic

Technology for a 250V Monolithic Complementary MOSFFT LSJ with N+ Buried-Layer Protected CMOS Logic

1986

Kouzou Sakamoto
Takeaki Okabe
Masatoshi Kimura
Koichiro Satonaka
Takanori Nishimura

Keywords:

Logic probe
Electrical engineering
Engineering
Electronic engineering
Diode–transistor logic
Resistor–transistor logic
AND-OR-Invert
CMOS
PMOS logic
Depletion-load NMOS logic
Pull-up resistor
Integrated injection logic
Logic family
Pass transistor logic
Logic gate

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