An Efficient Formal Verification Method in I/O Multiplexing Module Based on VC Formal CC
2020
As the integration of mainstream system on chips (SoCs) continues to increase, input/output (I/O) multiplexing technology is commonly used in SoC chips. For complex SoC circuits, the verification goals of I/O multiplexing circuits are comprehensive, fast, simple and efficient. When using traditional system-level simulation verification to verify the I/O reuse function, it is necessary to write scenario cases at the system level and then perform related assertion verification, which requires a lot of time and manpower. In this article, a static formal verification method is used to verify the I/O multiplexing at the chip level using VC Formal Connectivity Checking (CC). In the early stage of the verification, the I/O reuse was verified for connectivity, and the toggle coverage was also collected. During the verification process, there is no need to build a verification bench and write verification cases, which greatly saves verification man-hours and improves the verification quality.
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