Design of two-stage fully-integrated CMOS power amplifier for K-band applications

This paper presents a K-band power amplifier integrated circuit using Samsung 65 nm CMOS process. The power amplifier adopts two-stage configuration for high power gain. The input, output, and inter-stage transformers are integrated. By neutralizing gate-drain capacitance using cross-coupled capacitors, the power gain and stability were improved. Its chip size is 0.78 × 0.62 mm 2 . The implemented two-stage power amplifier showed a power gain of 19.6 dB, a saturated output power of 13.5 dBm, and an efficiency of 7.19 % with a supply voltage of 1.1 V at the frequency band of 24 GHz.