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Low Energy Building Design in Packet Buffer Architecture with Deterministic Performance Guarantee
Low Energy Building Design in Packet Buffer Architecture with Deterministic Performance Guarantee
2009
Zaitsu Kazuya
Iwamoto Hisashi
Kuroda Yasuto
Yano Yuji
Yamamoto Koji
Inoue Kazunari
Ata Shingo
Oka Ikuo
Keywords:
Building design
Embedded system
Architecture
Network packet
Circuit design
Computer science
low energy
performance guarantee
Correction
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