Simultaneous power supply, threshold voltage, and transistor size optimization for low-power operation of CMOS circuits
1998
This paper demonstrates a new approach for minimizing the total of the static and the dynamic power dissipation components in a complementary metal-oxide-semiconductor (CMOS) logic network required...
Keywords:
- Correction
- Source
- Cite
- Save
- Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI