Method and system for designing 3D Semiconductor package

Provided is a method for designing a 3D semiconductor package, comprising the steps of providing a first layout parameter for a plurality of first terminals included in a first package, a second layout parameter for a plurality of second terminals included in a second package at an upper part or a lower part of the first package, and a third layout parameter for a plurality of connection terminals which electrically connect the first package to the second package; obtaining a first wire connection layout between a first and a second terminal and the connection terminals by applying a first algorithm to the first to the third layout parameter; and obtaining a second wire connection layout between the first and the second terminal and the connection terminals by applying a second algorithm, different from the first algorithm, to the first wire connection layout.