Investigation of multilayer metallisation in a gate array device using cross-sectional transmission electron microscopy

Cross-sectional transmission electron microscopy (XTEM) was used to investigate structures of a multilayer metallisation of an integrated circuit. Microstructures of thin films, interfaces, interconnections, step coverage and dislocations in the device were revealed. Good step coverage was observed when polyimide was used as an insulator between two metal layers. The results indicate that, with a proper technique of sample preparation, XTEM can be utilised as a unique way to characterise cross-sectional structures of very large scale integrated circuits.