Buffer layer dependence of memory effects for SrBi2Ta2O9 on Si

Abstract The ability to form a high-quality buffer layer between the ferroelectric layer and the underlying silicon substrate is of critical importance. A suitable buffer layer must provide an acceptable electronic interface with the silicon substrate, and also must be able to prevent intermixing between the ferroelectric material and the underlying silicon, as well as prevent oxidation of the latter during device processing. This paper reports the properties of jet-vapor deposited silicon nitride and thermally grown silicon oxide as the buffer. Results from TEM, EDS, XRD and AFM micrographs will be presented, along with some electrical data taken from corresponding memory capacitor structures.