Synthesis of Moore Finite State Machines based on pseudoequivalent states

Abstract A new two-stage method of FSMs synthesis for PAL-based CPLD is proposed. It is based on both the wide fan-in of PAL cells and existence of the classes of pseudoequivalent states of Moore FSM. The first step targets decreasing for the number of PAL cells used for implementing the input memory functions. The second step targets decreasing for the number of PAL cells in the block of microoperations. An example of application of the proposed method is given, as well as, results of experiments carried out for standard benchmarks.