The Design of a Fast Transient Response and Capacitor-free LDO

2012 
Based on 0.5 μm process,designed an off-chip capacitor-free CMOS low dropout linear regulator(LDO) the input voltage range is 3.5~ 6.5 V,the output voltage is 3.3 V,maximum output current 100 mA.This LDO use automatic detection of network to sense load current changes rapidly and give inhibition of the output voltage transitions,improving the load transient response.In terms of stability,with miller compensation,couple witj the second stage use a buffer with small output resistance[1] make the system achieve stable..The simulation result shows when VIN=6.5 V and VIN=3.5 V,the LDO's undershoot is 156 mV and 135 mV,overshoot is 145 mV and 60 mV,the line regulation and load regulation are 0.023% and 0.5%.
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