Thermal Noise Limited, Scalable Multi-Piezoresistor Readout Architecture

In this work we present a low noise, hardware efficient, and scalable read-out architecture for piezoresistive mechanical transducers containing multiple sensing elements. To reach the thermal noise limit the sensing elements are driven by modulated, differential stimuli at separated frequencies, their current are summed and digitalized for signal processing and response extraction. The solution decreases the complexity of the analog read-out electronics and makes it easily scalable. Besides the improved signal-to-noise ratio the principle can achieve minimised power consumption and self-heating of piezoresistors with minimal analogue hardware resources. The distinguishing features of the arrangement are the multiple frequency modulation, the current based multiple sensor integration, one AD converter, no analog multiplexing, and the need for only a half Wheatstone bridge per sensing element.