Estimation of wafer cost for technology design

A simple cost model, capturing relationship between cost of the equipment ownership and the cost of manufacturing wafer, is proposed. This model is constructed in a way allowing for "fair" allocation of the cost of equipment idle time among products fabricated with significantly different technologies, sharing the same fabline. A necessary cost of equipment ownership data base has been built and a number of detailed process flows have been constructed. Finally, cost analysis for three categories of manufacturing scenarios: R&D, ASIC and high volume has been conducted. Results indicate large wafer cost differences between high volume differences also indicate that newer complex processes and manufacturing strategies should be developed with an aid of a cost modeling technique such as one described in this paper. >