MOSFET channel engineering using strained silicon, silicon-germanium, and germanium channels

We have explored many MOSFET channel designs in the SiGe/Relaxed SiGe/Si system to explore the limits of electron and hole mobility in inversion layers. A versatile UHVCVD system and a long channel one-mask MOSFET process have allowed us to explore carrier mobility in hundreds of MOSFET inversion layer structures over the past five years. We show that the main challenge in enhancing MOSFET performance beyond conventional strained Si lies in understanding structures that enhance hole mobility at high inversion charge densities. The largest improvement in both PMOS and NMOS drive current enhancements were achieved with a e-Si/e-Ge/relaxed Si 0.5 Ge 0.5 structure. At inversion charge densities of ∼10 13 cm -2 , hole mobility and electron mobility were enhanced by 10 x and 1.8 x, respectively. The results in these MOSFETs show that the strained SiGe materials system possesses the potential to further reduce the power-delay product in CMOS far beyond conventional strained Si.