Ultra low-voltage analog circuits for UHF RFID devices in 180 nm CMOS technology
2010
Radio-frequency identification by means of passive tags requires low-cost devices featuring extremely low power consumption for long reading distance and compatibility to small printed antennas. The paper describes the design and implementation of the key analog blocks in a RFID chip: power supply regulator, local oscillator and ASK demodulator. The proposed local oscillator exhibits a very low power consumption and achieves a frequency tolerance compatible with the requirements dictated by the ISO 18000-6 standards. In addition, an ultra-low power voltage reference and a regulator based on a zero-voltage threshold device are presented. These circuits are suitable to provide a regulated power supply to the local oscillator and to the core logic of the passive device. Measurements on a chip implemented in 0.18 μm digital CMOS technology validate the results obtained from simulations.
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