In-situ thermal assist recovery thanks to active silicide source on NMOS transistor in FD-SOI technology

Preliminary results are reported on new in-situ thermal assist recovery device and demonstrated in 28 nm FD-SOI CMOS technology. This approach consists in functionalizing the source of an MOS transistor and perform a recovery of device thermal performances. We demonstrate that it is possible to heat the device by the current at the source contacts. This paper reports the thermal resistor calibration on source and gate for the recovery of low and high VT NMOS devices with thin and thick high k metal gate oxide. 3D TCAD electro-thermal simulations assess the concept and electrical results. We have successfully reproduced the responses on a wide range of samples at wafer level by electrical sweep in the 100 ns range into sources contacts. The local temperature change effect was evaluated from room temperature up to + 500°C (measured and simulated). Finally, this first study opens the door on other solutions. It could be applied on other technology node.