A 3.3V/1W Class D Audio Power Amplifier with 103dB DR and 90% Efficiency
2002
A single-chip Integrated circuit of 3.3V/1W class-D high fidelity and high efficiency audio power amplifier is presented in this paper. The design has been done using a 3.3V/0.25um CMOS process. The maximum output power is 1W before the amplifier saturates. The THD+N at 0.5W output power is below 0.03% and efficiency is better than 90% thanks to the careful design of the output stage. The dynamic range is more than 100dB suitable for high fidelity audio applications. A single-loop single-bit third order sigma-delta modulator is used to generate the PWM signal from input audio signal. The PWM signal is then filtered at the output with a second order low pass filter external to the chip to regenerate the input signal.
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