Memory cell array and electronic device comprising the memory cell array

Memory cell array (5, 5 '), comprising: - memory cells (50) of each of an access device and a memory element; - along a first direction (62) extending bit lines (61, 61 '); - along a second direction (63) extending word lines (60, 60 '), wherein the second direction (63) perpendicular to the first direction (62); - portions of active regions (40), in each of which the access devices are formed and along parallel lines, active regions (44) are arranged, the direction of which crosses each of the bit lines and the word lines, and - bit-line (57), which are arranged both in columns extending in the second direction (63), as well as in rows which extend in the first direction (62) wherein: - a distance between centers of adjacent bit lines (61, 61 ') is dL, and a distance between centers of adjacent bit line in the first direction (57) corresponds dC, dC is dimensioned parallel to the first direction (62) and ...