A portable 3-axis 11-bit shock measurement circuit
1994
An ASIC interfacing 4 micromachined accelerometers has been designed and integrated in a 2 /spl mu/m technology and has a size of 55 mm/sup 2/. It consumes 300 /spl mu/A at 3 V, has a resolution of 11 bits and a programmable bandwidth of 16 Hz to 200 Hz. Low power operation has been obtained by the introduction of a sleep mode with rapid wake up. The chip has been designed to allow testability without sensor. >
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